Silicon bring-up. Seven worksheets in worksheets/ch5/ take you from "I have an ALU and a register file" to "I have a working CPU on a Tang Primer 25K bitstream running my hand-written sum-to-N." The highest-friction week of the course.
Anchors the week
Week 5: Computer Architecture. The moment your hardware runs your software is the moment the course's claim ("you can build the whole stack") becomes lived experience. Lab 5.4 is the canonical moment; budget it generously.
Concept the lab embodies
Fetch-decode-execute on silicon. The same three-stage cycle that runs in every CPU ever shipped, running in silicon you synthesized from Verilog you wrote.
The seven worksheets
| Worksheet | Tier | Time | Purpose |
|---|---|---|---|
| lab-5.1-instruction-decoder.md | T2 | ~90 min | Opcode bits → control signals |
| lab-5.2-cpu-integration-simulation.md | T2 | ~120 min | Simulate the full CPU before flashing (GTKWave hand-trace) |
| lab-5.2.5-step-through-visualizer.md | T1 | ~75 min | Calibrate against the Workbench Tab 4 visualizer (companion to 5.2) |
| lab-5.3-synthesize-tang-nano.md | T2 | ~120 min | The first flash; expect friction |
| lab-5.4-first-virtus-console-program.md | T2 | ~120 min | The moment hardware runs software |
| lab-5.5-debug-seeded-failure.md | T2 | ~120 min | Instructor-seeded bug; you fix it |
| lab-5.6-reading-your-own-hardware.md | T2 | ~90 min | Read your own Verilog as if you had not written it |
Lab 5.2.5 (step-through visualizer) is the Tier-1 calibration companion to Lab 5.2 (does not require any hardware); Lab 5.3 (synthesize-tang-nano) is the Tier-2 silicon-flash milestone that follows. The decimal numbering for 5.2.5 reflects the slot between the two integer-numbered labs and is the only sub-integer worksheet in the chapter. Many students find the order 5.1 -> 5.2 -> 5.2.5 -> 5.3 -> 5.4 -> 5.5 -> 5.6 clean; the visualizer can also run before 5.2 as a primer (Tier-1 calibration before Tier-2 hand-trace).
Grading rubric
Per-worksheet rubrics. Week-level: CPU simulates correctly; bitstream synthesizes; flash succeeds; sum-to-N runs on silicon. Browser-path students skip the synthesize + first-Virtus-Console-program flash labs and substitute the workbench bitstream-emit path; the visualizer worksheet sits inside the browser-path and remains required.
What's next
Lab pack 6: Assembler. The first tool you write that emits machine code.