Classroom

Read-only Stage 1 surface for 7 Virtus Cyber Academy courses. Each course landing lists its weekly modules, labs, and capstone packet. Interactive embeds (the nine Phase-1 visualizers) appear at the points in the curriculum that introduce them.

Foundations

Where every track starts. Numbers, bytes, hex, and the systems thinking the rest of the program builds on.

FND-101

Pipeline entry course. No prerequisites beyond basic algebra. ~105 hours total across 12 weeks. Audience: high-school and homeschool students, career changers, curious adults.

SPK-101

Gateway / Pre-CSA-101 motivational on-ramp. No-prereq introduction to game emulators, ROM hacking, and the 6502 historical anchor, all on a laptop, no hardware required. ~50 hours

Hardware

Circuits, microcontrollers, and the physical substrate digital logic actually runs on.

HW-101

The hands-on physical-electronics course. Students build real circuits with real parts, then teach an Arduino R4 to read sensors and drive actuators. By the capstone you have a wor

Networking

Packets, protocols, and the wire-format reading skills that anchor everything from blue-team detection to red-team C2.

NET-101

Network-track entry course. Prerequisite: FND-101 (or equivalent shell and hex-literacy). ~132 hours total across 12 weeks. Audience: FND-101 graduates, career changers, adults wit

Security

Threat modeling, cryptography, and the security-mindset shift from how-it-works to how-it-fails.

SEC-101

The pipeline's security-literacy gate. Students leave with the CIA triad, STRIDE threat modeling, OWASP Top 10, working cryptography vocabulary, CVE-reading discipline, and the pro

Reverse Engineering

Disassembly, dynamic analysis, and the firmware-archaeology skills the SB6141 capstone exercises end-to-end.

RE-011

Scaffolding course for the Virtus Cyber Academy reverse-engineering track. Read static analysis first. Build the habits that RE-101 and ADV-101 depend on.

Architecture

Build a CPU. Then build a compiler. Then build an OS. Then watch a Jack program you wrote run on FPGA silicon you wired.

CSA-101

The academy's flagship hardware-FPGA course. Students build a working RV32I-Lite CPU on a Tang Primer 25K FPGA, write its assembler, write its static linker, write its VM translato

About this surface

The public site at virtuscyberacademy.org stays in catalog and intro register: a student browsing publicly sees what each course is and what it teaches. The classroom you are reading now is where the actual weekly content lives. Stage 1 is read-only. Stage 2 will add authentication and progress tracking.

Source markdown is in the Git repository at courses/<slug>/. The renderer that produces these pages is at courses/_pipeline/render.py.