HDL Drag-Drop Simulator

Build, wire, energize, and verify a digital circuit

Every digital circuit you will meet in CSA-101, from a single NAND through the 6502's ALU, is a graph of small logic gates wired together. This workbench is where you sketch those graphs and watch signals flow through them.

Drop gates from the palette. Drop one or two INPUT nodes on the left and an OUTPUT node on the right. Click an output pin (right side of a gate) to start a wire, then click an input pin (left side) to connect. Click Energize to propagate signals through your circuit. Wires turn red for high (1), blue for low (0), and gray for unknown. Click an INPUT to flip its state and watch the rest of the circuit re-tick.

For sequential circuits, drop a CLOCK source (configurable period) and a DFF (D flip-flop). Wire D + CLK; the DFF latches D into Q on each rising clock edge. Click Tick to advance one time step. Below the canvas, the Testbench panel auto-detects your INPUT and OUTPUT nodes. Add rows with the inputs you want to try and the outputs you expect; click Run all to verify the circuit against your truth table.

Next rounds: walkthrough overlay + lab journal export + logic-analyzer trace (Round 4) · mobile-touch polish (Round 5).