19 technical terms used across Virtus Cyber Academy courses. Each entry has a short definition, the chapter that teaches it in depth, and cross-links to related terms. The same definitions appear as rollover popovers when you hover or tap any underlined term inside a course page.
A
accumulator
aliases: A register
A special CPU register that holds the result of arithmetic and logic operations. On the 6502 the accumulator is named A. Most arithmetic instructions read one operand from A, combine it with another value, and write the result back to A.
Where this is taught:
CSA-101 week-5-computer-architecture
See also:
register · CPU · instruction
First introduced:
SPK-101 cognitive-tools-supplement
address
aliases: memory address
A number that identifies one slot in memory. The CPU uses an address to read or write the value at that slot. On the NES the address space runs 0x0000 through 0xFFFF (64 KiB).
Where this is taught:
CSA-101 week-3-memory
See also:
page · byte · RAM
First introduced:
SPK-101 cognitive-tools-supplement
addressing-mode
aliases: addressing mode
The rule for interpreting an instruction's operand. A literal-addressing-mode operand IS the value (the 6502 prefix '#' marks immediate); an absolute-addressing-mode operand is the address of the value. The 6502 has six addressing modes; RV32I-Lite formats are the analogous concept on a modern RISC chip.
Where this is taught:
CSA-101 week-4-machine-language
See also:
operand · opcode · immediate-mode · instruction
First introduced:
SPK-101 cognitive-tools-supplement
B
bitplane
aliases: plane · bit plane
One bit per pixel of a multi-bit-per-pixel image, stored as a separate block from the other bits. The NES uses two bitplanes per 8x8 tile: combining one bit from Plane A with one bit from Plane B at the same pixel position gives a 2-bit color index (4 colors).
Where this is taught:
SPK-101 week-4-rom-hacking
See also:
sprite · tile · PPU · CHR-ROM
First introduced:
SPK-101 cognitive-tools-supplement
byte
A unit of 8 bits, holding one number from 0 to 255 (or one signed number from -128 to 127). One byte is the smallest individually addressable storage slot on most modern CPUs.
See also:
bit · address · RAM
First introduced:
SPK-101 cognitive-tools-supplement
C
CHR-ROM
aliases: chr-rom · character ROM
The part of an NES cartridge ROM that holds graphics data: sprite tiles and background tiles, each as a 16-byte 2-bitplane block. The PPU reads CHR-ROM directly to draw the screen.
Where this is taught:
SPK-101 week-4-rom-hacking
See also:
ROM · PPU · bitplane · tile
First introduced:
SPK-101 cognitive-tools-supplement
CPU
aliases: processor · central processing unit
Central processing unit: the chip that runs the program by fetching instructions, decoding them, and executing the operations they specify. The NES uses a 6502; modern PCs use x86_64 or ARM64.
Where this is taught:
CSA-101 week-5-computer-architecture
See also:
register · instruction · RAM · PPU
First introduced:
SPK-101 cognitive-tools-supplement
H
hexadecimal
aliases: hex
Base-16 number notation. Digits run 0 through 9 then A through F (A=10, B=11, ..., F=15). Two prefixes mark hex literals in code: '$XX' is the 6502 / classical assembly form; '0xXX' is the C / modern RISC form.
Where this is taught:
FND-101 week-1-numbers-binary
See also:
byte · binary
First introduced:
SPK-101 cognitive-tools-supplement
I
immediate-mode
aliases: immediate addressing · immediate
The addressing mode where the operand is the literal value, not an address. On the 6502 the '#' prefix marks immediate mode: 'LDA #$01' loads the literal 1 into A; 'LDA $01' loads the value stored at memory address 0x01.
Where this is taught:
CSA-101 week-4-machine-language
See also:
addressing-mode · operand · accumulator
First introduced:
SPK-101 cognitive-tools-supplement
instruction
One CPU operation. An instruction has an opcode (which operation) and zero or more operands (what the operation acts on). Programs are sequences of instructions stored in memory; the CPU fetches them one at a time and executes them.
Where this is taught:
CSA-101 week-4-machine-language
See also:
opcode · operand · CPU
First introduced:
SPK-101 cognitive-tools-supplement
O
opcode
The part of an instruction that names which operation to perform. 'LDA', 'STA', 'JMP' are 6502 opcodes; 'add', 'sub', 'lw' are RV32I-Lite opcodes. The opcode tells the CPU what to do; the operand tells it what to do it to.
Where this is taught:
CSA-101 week-4-machine-language
See also:
operand · instruction · CPU
First introduced:
SPK-101 cognitive-tools-supplement
operand
The part of an instruction that names what the operation acts on. In 'LDA #$42' the operand is '#$42' (a literal); in 'LDA $42' the operand is '$42' (an address). Operand interpretation depends on the addressing mode.
Where this is taught:
CSA-101 week-4-machine-language
See also:
opcode · addressing-mode · instruction
First introduced:
SPK-101 cognitive-tools-supplement
P
page
aliases: zero page · memory page · paging
A fixed-size chunk of memory addresses, typically 256 bytes on 6502 / 8-bit systems or 4096 bytes on modern CPUs. Memory pages let hardware and software work with memory in regular-sized blocks instead of as individual bytes. The NES 'zero page' is the first 256 bytes of RAM ($00 through $FF).
Where this is taught:
CSA-101 week-3-memory
See also:
address · RAM · byte
First introduced:
SPK-101 cognitive-tools-supplement
External references:
Petzold CODE 1st ed., Ch 16, p. 201
PPU
aliases: picture processing unit
Picture processing unit: the NES's graphics chip. The PPU reads sprite and background data from CHR-ROM, combines it with palette and attribute data, and produces the video signal sent to the TV. The NES PPU runs in parallel with the CPU.
Where this is taught:
SPK-101 week-4-rom-hacking
See also:
CHR-ROM · sprite · tile · bitplane
First introduced:
SPK-101 cognitive-tools-supplement
R
RAM
aliases: random-access memory
Random-access memory: storage the CPU can read and write during program execution. RAM contents are lost when power goes off. On the NES the CPU sees 2 KiB of internal RAM mirrored across $0000 through $1FFF.
Where this is taught:
CSA-101 week-3-memory
See also:
ROM · address · page · byte
First introduced:
SPK-101 cognitive-tools-supplement
register
A CPU's smallest, fastest storage slot. The 6502 has three general-purpose registers (A, X, Y), a program counter, a stack pointer, and a status register. RV32I-Lite has 31 general-purpose 32-bit registers (x1 through x31, plus the always-zero x0).
Where this is taught:
CSA-101 week-5-computer-architecture
See also:
CPU · accumulator · instruction
First introduced:
SPK-101 cognitive-tools-supplement
ROM
aliases: read-only memory
Read-only memory: storage that holds program code and fixed data permanently. ROM contents survive power-off. The NES cartridge contains two ROM chips: PRG-ROM (program code) and CHR-ROM (graphics data).
Where this is taught:
CSA-101 week-3-memory
See also:
RAM · CHR-ROM
First introduced:
SPK-101 cognitive-tools-supplement
S
sprite
A small graphic the PPU draws on top of the background, used for movable objects (player characters, enemies, projectiles). NES sprites are 8x8 pixels (or 8x16 in tall-sprite mode), stored as 16 bytes in CHR-ROM in the same 2-bitplane format as background tiles.
Where this is taught:
SPK-101 week-4-rom-hacking
See also:
tile · PPU · bitplane · CHR-ROM
First introduced:
SPK-101 cognitive-tools-supplement
T
tile
A small fixed-size graphic block used for the background layer. NES tiles are 8x8 pixels stored as 16 bytes in CHR-ROM in the same 2-bitplane format as sprites. The PPU composes the screen background by drawing a grid of tiles.
Where this is taught:
SPK-101 week-4-rom-hacking
See also:
sprite · PPU · bitplane · CHR-ROM
First introduced:
SPK-101 cognitive-tools-supplement